Smartphones and portable electronic devices are spurring growth in Taiwan’s IC packaging and testing industry.
Leveraging climbing demand for smartphones and portable electronics, Taiwan’s IC packaging and testing industry is expanding high-density packaging technologies.
Makers expect a more than 10 percent increase YoY in production value. This is forecast to reach $15.7 billion by year-end and account for roughly 27 percent of the island’s semiconductor total. In 2010, the segment hit $14.3 billion.
At present, BGA and QFP are the mainstream types. QFN, WLP, copper wire, aMaP PoP and FCCSP are also popular for their low cost and high performance. The last is mainly applied in mobile phones, tablet PCs and WLAN cards. CSP is likewise used in handsets and tablets, and in PDAs and Bluetooth earphones. PC graphics cards and chipsets employ FCBGA, while MEMS is an option for mobile devices and car electronics. Among the regular packaging techniques, the most popular are the leadframe, laminate BGA, DCA and WLP.
Makers integrate multiple ICs such as logic, memory and RF in SoCs to enable miniaturization, and high density and functionality. These are adopted in mobile phones, MP3 players, portable navigation devices, and digital cameras and photo frames.
SiP, which includes MCM BGA and stacked die package, is a major method in this category, with use rapidly rising in solid state disks, memory cards and portable electronics.
In addition to SiP, 3D and TSV technologies are emerging. The first is still in its infancy and may take a few more years to mature, according to Chipsip Technology Co. Ltd. CMOS sensors and memory chips adopt TSV, while CPUs, baseband and RF ICs are future applications.
PoP is another key packaging method. Chipsip, in fact, offers a 7-in-1 integrated chipset, which combines PoP SiP of digital and RF SiPs. The model consists of an application processor, 802.11b/g/n and Bluetooth chips, two DDR3 SDRAMs and two NAND flash memory chips. The configuration simplifies PCB assembly and layout, which suits ultrathin and lightweight portable devices such as tablet PCs and smartphones. In tablet PC boards, the design results in a size reduction of up to 80 percent.
As regards testing, Taiwan suppliers are conducting comparative research on the advantages and disadvantages of capacitive and resistive approaches. The ASE Group is one of them.
Capacitive testing suits situations with virtual zero fixture cost and no fixture design and lead time. It however, has a low throughput of 0.01s/bump and requires testing on bump at a time. A double-sided test is also needed. The approach has high unit test outlay and the result is occasionally inconclusive.
The resistive method, on the other hand, has a faster measurement time and better open test runs in parallel and lower unit test costs. Its disadvantages include short serial test runs, low throughput, double-sided testing, expensive probe card and probe card pitch limitation.
IC packaging: Testing sectors gain ground
Note: All price quotes in this report are in US dollars unless otherwise specified. FOB prices were provided by the companies interviewed only as reference prices at the time of interview and may have changed.
Disclaimer: All product images are provided by the companies interviewed and are for reference purposes only. Those product images featuring products with trademarks, brand names or logos are not intended for sale. We, our affiliates, and our affiliates’ respective directors, officers, employees, representatives, agents or contractors, do not accept and will not have any responsibility or liability for product images (or any part thereof) which infringe on any intellectual property or other rights of a third party.